$ python timer_test.py Base at: 0x816be0000 FB at: 0x9e0df8000 Timer freq: 24000000 Testing HV timers... TGE = 1 P: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b V: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b Testing guest timers... TGE = 1, vGIC mode=0, timers unmasked P: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b V: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b TGE = 1, vGIC mode=0, timers masked P: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b V: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b TGE = 0, vGIC mode=0, timers unmasked P: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b V: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b TGE = 0, vGIC mode=0, timers masked P: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b V: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b TGE = 0, vGIC mode=1, timers unmasked P: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=64) CTL=5 VTMR_LIST=1b0000001b V: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=4000001b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=4000001b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=4000001b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=4000001b0000001b TGE = 0, vGIC mode=1, timers masked P: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b V: . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=1 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b . (ISR_EL1=0) CTL=5 VTMR_LIST=1b0000001b